In order to meet increasing performance targets, advanced complimentary metal-oxide-silicon (CMOS) technologies are being scaled down in size to the point that sensitivity to ESD is becoming a significant reliability problem. The use of silicon control rectifiers (SCRs) to protect CMOS technologies built with bulk silicon substrates is known in the industry. However, current SCR-based ESD protection devices suffer from high junction capacitance and current crowding making them unsuitable for CMOS technologies built with SOI substrates. Therefore, there is an ongoing need for an SCR device for electrostatic discharge (ESD) protection in integrated circuits fabricated on silicon-on-insulator (SOI) substrates.